1. Field of the Invention
The present invention relates generally to a circuit board surface structure and fabrication method thereof, and more particularly to a method of forming conductive elements on electrically connecting pads on a circuit board surface structure for electrically connecting with an external device.
2. Description of Related Art
According to flip-chip technology nowadays, an IC semiconductor chip has electrode pads disposed on an active surface thereof, an organic circuit board has electrically connecting pads corresponding to the electrode pads. A solder structure or other conductive adhesive material is formed between the electrode pads of the semiconductor chip and the electrically connecting pads of the circuit board for providing electrical and mechanical connection between the semiconductor chip and the circuit board.
As shown in FIG. 1, flip-chip technology involves forming a plurality of metal bumps 11 on surfaces of the electrode pads 12 of a semiconductor chip 13, and forming a plurality of pre-solder structures 14 made of solder on surfaces of electrically connecting pads 15 of a circuit board 16. At a reflow temperature sufficient to melt the pre-solder structures 14, the pre-solder structures 14 are reflowed to form solder joints 17 on the metal bumps 11. Then, an underfill material 18 is filled between the semiconductor chip 13 and the circuit board 16 so as to ensure integrity and reliability of electrical connection between the semiconductor chip 13 and the circuit board 16.
FIGS. 2A to 2D are cross-sectional views showing a conventional stencil printing method for depositing solder material on electrically connecting pads of a circuit board. As shown in FIGS. 2A and 2B, a circuit board 20 having electrically connecting pads 201 on a surface thereof is provided. A solder mask layer 21 is a photoimagable polymer coated on the surface of the circuit board 20 and a mask 22 is formed on the solder mask layer 21. The mask 22 has opaque regions 22a corresponding to the electrically connecting pads 201 such that by exposure and development, openings 210 can be formed in the solder mask layer 21 to expose the electrically connecting pads 201. However, in the exposure process, due to diffraction, light is deflected toward regions under the opaque regions 22a, thus forming light deflection path S as shown in FIG. 2A. As a result, part of the solder mask layer 21 under the opaque regions 22a is exposed to the light, which makes the openings 210 formed later through the development process have a tapered downward shape with wide top and narrow bottom. As shown in FIG. 2C, a stencil 23 having a plurality of grids 23a is disposed on the surface of the circuit board 20, wherein the grids 23a correspond in position to the electrically connecting pads 201. Solder material is applied to a surface of the stencil 23. Then, a roller 24 is rolled back and forth on the stencil 23 such that the solder material is disposed in the grids 23a of the stencil 23. Alternatively, a spraying method can be used to dispose the solder material in the grids 23a. The stencil 23 is removed, and then solder (not shown) is formed on the electrically connecting pads 201. Afterward, as shown in FIG. 2D, a reflow-soldering process is performed at the reflow temperature such that the solder is reflowed to form solder bumps 25 on the electrically connecting pads 201 of the circuit board 20. Thus, solder structures are formed on the circuit board by stencil printing technology.
To meet the demand for miniaturized, multi-function electronic products, circuit boards feature increasingly crowded circuits and increasingly thin layers. Hence, high-density, multi-pin packages have to come with reduced circuit width and small electrically connecting pads. Therefore, with a reducing pitch between circuits such as electrically connecting pads, openings in the solder mask layer on the electrically connecting pads are becoming smaller. As a result, the contact area between the solder structures to be formed later and the electrically connecting pads is reduced. Thus, the solder structures cannot be easily formed on the surfaces of the electrically connecting pads, and requirement for fine pitch between electrically connecting pads of advanced electronic products cannot be met.
Each of the openings 210 in the solder mask layer 21 is tapered downward and therefore has a wide top and a narrow bottom, and thus each of the solder bumps 25 has a wide top and a narrow bottom. As a result, a reduced contact area between the solder bumps 25 and the electrically connecting pads 201 accompanies reduced bonding between the solder bumps 25 and the electrically connecting pads 201. Furthermore, the solder bumps 25 in the openings 210 have no embedding structure, and thus the solder bumps 25 are likely to detach from the openings 210.
Therefore, there is a need to provide a circuit board surface structure and a fabrication method thereof that can facilitate forming of solder structures on electrically connecting pads of a circuit board so as to meet requirement for fine pitch between electrically connecting pads of advanced electronic products.